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Florian received his Phd degree from the Vienna University of Technology, in 2009. He is associate professor at Telecom ParisTech (Paris, France) in the Network and Computer Science Department. He is interested in code generation techniques, register allocation, instruction scheduling and instruction bundling for VLIW architectures, as well as simulation techniques, such as dynamic binary translation. Recently, he also found interest in problems related to computing under timing constraints (real-time systems, etc.). He is responsible of the relationships between the compilation group and the GPL CNRS research network.
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Laure received her PhD degree in computer science from the University Joseph Fourier (Grenoble, France), in 2007. She has been an assistant professor at the University of Lille, and currently holds an assistant professor position at University Lyon I/UCBL. Her main research interests lay in the design of static analyses, with emphasis on the automatic synthesis of numerical invariants and application in compilation (scheduling) and termination proofs. She belongs to the ROMA joint team of the LIP laboratory (ENS Lyon). She is responsible of the relationships between the group and the ASR CNRS research network.
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Fabrice Rastello is the leader of the GCG (Grenoble Compiler Group) Inria team. His expertize is both on automatic parallelization (PhD thesis on tiling as a loop transformation), and compiler back-end optimization (engineer at STMicroelectronics compiler group + researcher in Compsys Inria team). Among others, he advised three PhD thesis so as to fully revisit register allocation for JIT compilation in the light of Static Single Assignment (SSA) properties. He likes mixing theory (mostly graphs, algorithmic, and algebra) and practice (industrial transfer). His current research topics are mostly focused on combining run-time techniques with static compilation. Hybrid compilation being an example of such approach he is trying to promote. Fabrice is the Big Chief.
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